Design of Nano Scale Based Logic Gates Using Quantum-dot cellular Automata

As complementary metal–oxide–semiconductor (CMOS) technology approaches its fundamental scaling limits, emerging nanotechnologies have gained significant attention as potential alternatives. Among these, Quantum-dot Cellular Automata (QCA) has emerged as a promising model due to its ultra-low power consumption, high device density, and nanoscale operation. This work explores the design and analysis of fundamental QCA logic gates, including AND, NAND, OR, NOR, XOR, and XNOR. The proposed designs are evaluated based on key performance metrics such as cell count, occupied area and latency. Functional verification and performance analysis are carried out using QCADesigner version 2.0.3. Furthermore, the energy efficiency of the implemented logic gates is assessed using the QCADesigner-E tool.