Performance Analysis of a Single-Stag Cascode LNA in 180-nm CMOS Technology

A compact RF front-end amplifier is developed for S-band communication systems using a 180-nm CMOS process. The proposed circuit adopts a single-stage cascode configuration in which source inductive degeneration is incorporated to simultaneously improve the input impedance characteristics and optimize the trade-off between amplification and noise performance. Based on schematic-level simulations, the designed LNA achieves a maximum gain of > 50 dB, whereas the simulated noise figure less than2 dB within the S-band frequency range. The design also maintains satisfactory input/output impedance matching and unconditional stability over the intended operating region. The active circuit occupies only 0.180 mm² of silicon area and dissipates approximately 52 mW of power. The combination of high gain, low noise, stable operation, and compact implementation makes the proposed architecture a promising candidate for S-band receiver front ends. Furthermore, its single-stage realization reduces circuit complexity while delivering performance that is competitive with comparatively sophisticated multi-stage LNA designs.