CORDIC-based Transceiver Architectures for WSN Applications: A Review

Wireless Sensor Networks (WSNs) need low-power, secure, and fast communication methods because sensor nodes have limited energy and computing power. This study examines 25 research publications from the MDPI, IEEE, and Springer databases to showcase current advancements in CORDIC-based digital transceiver topologies for WSN applications. In order to improve communication capabilities and lower computational complexity, the study focuses on hardware-efficient CORDIC algorithmic methods, FPGA-based architectures, and high-throughput transceiver designs. The existing research shows that standardized and pipelined CORDIC topologies significantly reduce latency, power consumption, and device usage. The lack of unified transceiver designs, the restricted integration of lightweight safety procedures, and the inadequate FPGA-level validation under WSN restrictions are some of the remaining drawbacks. Furthermore, there are yet no established benchmarking techniques for comparing performance. The review work highlights that; there is need of secure and integrated CORDIC-based transceiver architecture for future WSN applications.